My Report

Analog Circuits Mock Test 5


Correct Answer: 2 points | Wrong: -1 point
Grades: A* (100% score) | A (80%-99%) | B (60%-80%) | C (40%-60%) | D (0%-40%)
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Question 1 of 10

1. If 1/h12 = 10 for a C.E. stage, what is the value of the base to collector capacitance, after Miller multiplication, at the output side?

Question 1 of 10

Question 2 of 10

2. Consider its input resistance to be R1. Now, the bypass capacitor is attached, so that the new input resistance is R2. Given that hie = 1000Ω and hfe = 50, find R1-R2.
analog-circuits-questions-answers-hybrid-equivalent-model-q8

Question 2 of 10

Question 3 of 10

3. A voltage amplifier has a voltage gain of 100. What will be gain at 3dB cut-off frequencies?

Question 3 of 10

Question 4 of 10

4. Which of the following statements is most correct to explain role of biasing circuit in the implementation of a transistor circuit?

Question 4 of 10

Question 5 of 10

5. The Collector feedback configuration is better than __________

Question 5 of 10

Question 6 of 10

6. Bandwidth of amplifier is __________

Question 6 of 10

Question 7 of 10

7. In a simple follower stage, C2 is a parasitic capacitance arising due to the depletion region between the collector and the substrate. What is the value of C2?

Question 7 of 10

Question 8 of 10

8. -6dB is equivalent to __________ power gain.

Question 8 of 10

Question 9 of 10

9. Which parasitic capacitors are present at the collector terminal of the B.J.T.?

Question 9 of 10

Question 10 of 10

10. What is the role of emitter resistance in the transistor amplifying circuit?

Question 10 of 10


 

Manish Bhojasia - Founder & CTO at Sanfoundry
Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He lives in Bangalore, and focuses on development of Linux Kernel, SAN Technologies, Advanced C, Data Structures & Alogrithms. Stay connected with him at LinkedIn.

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