Computer Organization and Architecture Mock Test 1

10%

Question 1 of 10

1. Which of the register/s of the processor is/are connected to Memory Bus?

Both PC and MAR

MAR

Question 1 of 10

Question 2 of 10

2. When we perform subtraction on -7 and 1 the answer in 2's complement form is _________

1000

0110

1110

1010

Question 2 of 10

Question 3 of 10

3. In a normal n-bit adder, to find out if an overflow as occurred we make use of ________

And gate

Xor gate

Nor gate

Nand gate

Question 3 of 10

Question 4 of 10

4. MFC stands for ___________

Memory Find Command

Mass Format Command

Memory Function Complete

Memory Format Caches

Question 4 of 10

Question 5 of 10

5. When we perform subtraction on -7 and -5 the answer in 2's complement form is ________

1110

0010

11110

1010

Question 5 of 10

Question 6 of 10

6. The instruction -> Add LOCA, R0 does _______

Adds the values of both LOCA and R0 and stores it in R0

Adds the value of LOCA to R0 and stores in the temp register

Adds the value of R0 to the address of LOCA

Adds the value of LOCA with a value in accumulator and stores it in R0

Question 6 of 10

Question 7 of 10

7. The main advantage of multiple bus organisation over a single bus is _____

None of the mentioned

Reduction in the number of cycles for execution

Increase in size of the registers

Better Connectivity

Question 7 of 10

Question 8 of 10

8. Which registers can interact with the secondary storage?

MAR

Question 8 of 10

Question 9 of 10

9. The instruction, Add #45,R1 does _______

Adds the value of 45 to the address of R1 and stores 45 in that address

None of the mentioned

Finds the memory location 45 and adds that content to that of R1

Adds 45 to the value of R1 and stores it in R1

Question 9 of 10

Question 10 of 10

10. If the instruction, Add R1, R2, R3 is executed in a system that is pipe-lined, then the value of S is (Where S is a term of the Basic performance equation)?

Question 10 of 10