Digital Circuits Mock Test 2

10%

Question 1 of 10

1. The maximum noise voltage that may appear at the input of a logic gate without changing the logical state of its output is termed as __________

Signal to Noise Ratio

Noise Immunity

White Noise

Noise Margin

Question 1 of 10

Question 2 of 10

2. TTL is a ____________

Current sinking

Current sourcing

Voltage sinking

Voltage sourcing

Question 2 of 10

Question 3 of 10

3. Power Dissipation in DIC is expressed in __________

Watts or kilowatts

Mdb

Milliwatts or nanowatts

Question 3 of 10

Question 4 of 10

4. The ECL behaves as __________

NOT gate

NAND gate

AND gate

NOR gate

Question 4 of 10

Question 5 of 10

5. The basic logic gate whose output is the complement of the input is the ___________

INVERTER gate

AND gate

OR gate

XOR gate

Question 5 of 10

Question 6 of 10

6. The full form of CTDL is ___________

Complemented transistor diode logic

Complementary transistor direct logic

Complemented transistor direct logic

Complementary transistor diode logic

Question 6 of 10

Question 7 of 10

7. What is the static charge that can be stored by your body as you walk across a carpet?

30000 volts

Over 30000 volts

300 volts

3000 volts

Question 7 of 10

Question 8 of 10

8. The process to avoid saturating the switching transistor is performed by ___________

James R. Biard

Totem-Pole

Baker clamp

Chris Brown

Question 8 of 10

Question 9 of 10

9. TTL inputs are the emitters of a ____________

Multiple-emitter transistor

Diode-transistor logic

Transistor-transistor logic

Resistor-transistor logic

Question 9 of 10

Question 10 of 10

10. The disadvantage of RTL is that __________

It results in high power dissipation

High noise creation

It uses a minimum number of transistors

It uses a maximum number of resistors

Question 10 of 10