My Report

Digital Circuits Mock Test 3


Correct Answer: 2 points | Wrong: -1 point
Grades: A* (100% score) | A (80%-99%) | B (60%-80%) | C (40%-60%) | D (0%-40%)
advertisement
 10%

Question 1 of 10

1. If A, B and C are the inputs of a full adder then the carry is given by __________

Question 1 of 10

Question 2 of 10

2. Procedure for the design of combinational circuits are:

A. From the word description of the problem, identify the inputs and outputs and draw a block diagram.
B. Draw the truth table such that it completely describes the operation of the circuit for different 
combinations of inputs.
C. Simplify the switching expression(s) for the output(s).
D. Implement the simplified expression using logic gates.
E. Write down the switching expression(s) for the output(s).

Question 2 of 10

Question 3 of 10

3. If A, B and C are the inputs of a full adder then the sum is given by __________

Question 3 of 10

Question 4 of 10

4. CVSL means _____________

Question 4 of 10

Question 5 of 10

5. Low-voltage positive emitter-coupled logic (LVPECL) is a power optimized version of __________

Question 5 of 10

Question 6 of 10

6. CMOS behaves as a/an ____________

Question 6 of 10

Question 7 of 10

7. Which insulating layer used in the fabrication of MOSFET?

Question 7 of 10

Question 8 of 10

8. The flag bits in an ALU is defined as ___________

Question 8 of 10

Question 9 of 10

9. Let the input of a subtractor is A and B then what the output will be if A = B?

Question 9 of 10

Question 10 of 10

10. What is used to higher the speed of operation in MOSFET fabrication?

Question 10 of 10


 

Manish Bhojasia - Founder & CTO at Sanfoundry
Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He lives in Bangalore, and focuses on development of Linux Kernel, SAN Technologies, Advanced C, Data Structures & Alogrithms. Stay connected with him at LinkedIn.

Subscribe to his free Masterclasses at Youtube & discussions at Telegram SanfoundryClasses.