My Report

Digital Circuits Practice Test 7


Correct Answer: 2 points | Wrong: -1 point
Grades: A* (100% score) | A (80%-99%) | B (60%-80%) | C (40%-60%) | D (0%-40%)
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1. In digital logic, a counter is a device which ____________

2. A reliable method for eliminating decoder spikes is the technique called ________

3. How many natural states will there be in a 4-bit ripple counter?

4. How many different states does a 2-bit asynchronous counter have?

5. Three cascaded decade counters will divide the input frequency by ____________

6. In a 3-bit asynchronous down counter, the initial content is ____________

7. A 5-bit asynchronous binary counter is made up of five flip-flops, each with a 12 ns propagation delay. The total propagation delay (tp(total)) is ____________

8. Modulus refers to ____________

9. For realisation of SR flip-flop from JK flip-flop, the excitation input will be obtained from ___________

10. One of the major drawbacks to the use of asynchronous counters is that ____________


 

Manish Bhojasia - Founder & CTO at Sanfoundry
Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He lives in Bangalore, and focuses on development of Linux Kernel, SAN Technologies, Advanced C, Data Structures & Alogrithms. Stay connected with him at LinkedIn.

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