VHDL Mock Test 4

1. If the condition of IF statement is an expression, then what should be the type of the result of the expression?

2. It is possible to use sensitivity list and wait statements in the same process.

3. It is possible to use a range in the choice part of the CASE statement.

4. Which of the following keyword is not associated with IF statement?

5. In case of concurrent assignment, order of statements doesn’t matter.

6. Which of the following statement is used when there are no signals in the sensitive list?

7. The CASE statement in VHDL is similar to _________ in C.

8. The resolution function is needed to resolve the value of _______

PROCESS ()
BEGIN
y <= x;
y <= z;
END PROCESS;

9. Which of the following operators can't be used in the choices of a CASE?

10. Refer to the code given below, what kind of circuit is designed?

SIGNAL x : IN BIT;
SIGNAL y : OUT BIT;
SIGNAL clk : IN BIT;
PROCESS (clk)
BEGIN
IF (clk’EVENT and clk = ‘1’)
y ;&lt= x;
END PROCESS